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(R)
FAST CMOS OCTAL D REGISTERS (3-STATE)
IDT54/74FCT374/A/C IDT54/74FCT534/A/C IDT54/74FCT574/A/C
Integrated Device Technology, Inc.
FEATURES:
* IDT54/74FCT374/534/574 equivalent to FASTTM speed and drive * IDT54/74FCT374A/534A/574A up to 30% faster than FAST * IDT54/74FCT374C/534C/574C up to 50% faster than FAST * IOL = 48mA (commercial) and 32mA (military) * CMOS power levels (1mW typ. static) * Edge triggered master/slave, D-type flip-flops * Buffered common clock and buffered common threestate control * Product available in Radiation Tolerant and Radiation Enhanced versions * Military product compliant to MIL-STD-883, Class B * Meets or exceeds JEDEC Standard 18 specifications
DESCRIPTION:
The IDT54/74FCT374/A/C, IDT54/74FCT534/A/C and IDT54/74FCT574/A/C are 8-bit registers built using an advanced dual metal CMOS technology. These registers consist of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) is LOW, the eight outputs are enabled. When the OE input is HIGH, the outputs are in the high-impedance state. Input data meeting the set-up and hold time requirements of the D inputs is transferred to the O outputs on the LOW-toHIGH transition of the clock input. The IDT54/74FCT374/A/C and IDT54/74FCT574/A/ C have non-inverting outputs with respect to the data at the D inputs. The IDT54/74FCT534/A/C have inverting outputs.
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT374 AND IDT54/74FCT574
D0 CP CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q D1 D2 D3 D4 D5 D6 D7
OE O0 O1 O2 O3 O4 O5 O6 O7
2603 cnv* 01
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT534
D0 CP CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q CP D Q D1 D2 D3 D4 D5 D6 D7
OE O0 O1 O2 O3 O4 O5 O6 O7
2603 cnv* 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a trademark of National Semiconductor, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1992 Integrated Device Technology, Inc.
MAY 1992
DSC-4622/2
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IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT374
OE O0 D0 D1 O1 O2 D2 D3 O3 GND
D0
3
2 3 4 5 6 7 8 9 10 P20-1 D20-1 SO20-2 & E20-1
19 18 17 16 15 14 13 12 11
O7 D7 D6 O6 O5 D5 D4 O4 CP
2603 cnv* 03
O0
2
1
20
VCC
OE VCC O7
1 20 19 18 17 16 15 14
INDEX
D1 O1 O2 D2 D3
4 5 6 7 8
D7 D6 O6 O5 D5
L20-2
9 10 11 12 13
GND
CP
O3
DIP/SOIC/CERPACK TOP VIEW
LCC TOP VIEW
OE D0 D1 D2 D3 D4 D5 D6 D7 GND
1 2 3 4 5 6 7 8 9 10 P20-1 D20-1 SO20-2 & E20-1
20 19 18 17 16 15 14 13 12 11
VCC O0 O1 O2 O3 O4 O5 O6 O7 CP
2603 cnv* 05
32 D2 D3 D4 D5 D6 4 5 6 7 8
D0
OE
1
21 1 1 1 1 1 O1 O2 O3 O4 O5
L20-2
91 1 1 1
D7 GND
CP
O7
O6
VCC O0
IDT54/74FCT574
D1
INDEX
O4
D4
2603 cnv* 04
2603 cnv* 06
DIP/SOIC/CERPACK TOP VIEW
LCC TOP VIEW
IDT54/74FCT534
OE O0 D0 D1 O1 O2 D2 D3 O3 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 P20-1 17 D20-1 16 SO20-2 15 & E20-1 14 13 12 11 VCC O7 D7 D6 O6 O5 D5 D4 O4 CP
2603 cnv* 07
32 D1 O1 O2 D2 D3 4 5 6 7 8
1
20 19 18 17 16 15 14
VCC O7
OE
O0
D0
INDEX
D7 D6 O6 O5 D5
L20-2
9 10 11 12 13
O3 GND
CP O4
D4
2603 cnv* 08
DIP/SOIC/CERPACK TOP VIEW
LCC TOP VIEW
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IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names DN CP ON Description D flip-flop data inputs. Clock Pulse for the register. Enters data on LOW-to-HIGH transition. 3-state outputs, (true). 3-state outputs, (inverted). Active LOW 3-state Output Enable input.
2603 tbl 06
ON OE
FUNCTION TABLE(1)
Inputs Function Hi-Z Load Register FCT534 Outputs Internal DN X X L H L H FCT374/574 Outputs Internal ON Z Z L H Z Z
OE
H H L L H H
CP
ON
Z Z H L Z Z
QN NC NC L H L H
QN
NC NC H L H L
2603 tbl 05
NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care
u u u u
L H
u
Military -0.5 to +7.0 Unit V
Z = High Impedance NC = No Change = LOW-to-HIGH transition
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Rating Commercial VTERM(2) Terminal Voltage -0.5 to +7.0 with Respect to GND (3) Terminal Voltage VTERM -0.5 to VCC with Respect to GND TA Operating 0 to +70 Temperature TBIAS Temperature -55 to +125 Under Bias TSTG Storage -55 to +125 Temperature PT Power Dissipation 0.5 IOUT DC Output Current 120
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit
pF pF
-0.5 to VCC
V C C C W mA
-55 to +125 -65 to +135 -65 to +150 0.5 120
NOTE: 2603 tbl 02 1. This parameter is measured at characterization but not tested.
NOTES: 2603 tbl 01 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only.
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IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL II H II L IOZH IOZL VIK IOS VOH Clamp Diode Voltage Short Circuit Current Output HIGH Voltage VCC = Min., IN = -18mA VCC = Max.(3) , VO = GND VCC = 3V, VIN = VLC or VHC, IOH = -32A VCC = Min. VIN = VIH or VIL VOL Output LOW Voltage IOH = -300A IOH = -12mA MIL. IOH = -15mA COM'L. VCC = 3V, VIN = VLC or VHC, IOL = 300A VCC = Min. VIN = VIH or VIL IOL = 300A IOL = 32mA MIL. IOL = 48mA COM'L. Parameter Input HIGH Level Input LOW Level Input HIGH Current Input LOW Current Off State (High Impedance) Output Current VCC = Max. Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC VI = 2.7V VI = 0.5V VI = GND VO = VCC VO = 2.7V VO = 0.5V VO = GND Min. 2.0 -- -- -- -- -- -- -- -- -- -- -60 VHC VHC 2.4 2.4 -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -- -- -- -0.7 -120 VCC VCC 4.3 4.3 GND GND 0.3 0.3 Max. -- 0.8 5 5(4) -5(4) -5 10 10(4) -10(4) -10 -1.2 -- -- -- -- -- VLC VLC(4) 0.5 0.5
2603 tbl 03
Unit V V
A
A
V mA V
V
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. This parameter is guaranteed but not tested.
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IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC - 0.2V
Symbol ICC ICC ICCD Parameter Quiescent Power Supply Current Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) VCC = Max. VIN VHC; V VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open OE = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND fi = 5MHz 50% Duty Cycle One Bit Toggling VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND Eight Bits Toggling fi = 2.5MHz 50% Duty Cycle VIN VHC VIN VLC Test Conditions(1)
IN
Min. -- -- --
Typ.(2) 0.2 0.5 0.15
Max. 1.5 2.0 0.25
Unit mA mA mA/ MHz
VLC
IC
Total Power Supply Current (6)
VIN VHC VIN VLC (FCT) VIN = 3.4V VIN = GND
--
1.7
4.0
mA
--
2.2
6.0
VIN VHC VIN VLC (FCT) VIN = 3.4V VIN = GND
--
4.0
7.8 (5)
--
6.2
16.8 (5)
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz.
2603 tbl 04
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IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT374/534/574 Com'l. Symbol Parameter Conditions(1) Min.(2) Max. Mil. Min.(2) Max. FCT374A/534A/574A Com'l. Min.(2) Max. Mil. Min.(2) Max. FCT374C/534C/574C Com'l. Min.(2) Max. Mil. Min.(2) Max. Unit
tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW
Propagation Delay CP to ON(3) Output Enable Time Output Disable Time Set-up Time HIGH or LOW, DN to CP Hold Time HIGH or LOW, DN to CP CP Pulse Width HIGH or LOW
CL = 50pF RL = 500
2.0 1.5 1.5 2.0 1.5 7.0
10.0 12.5 8.0 -- -- --
2.0 1.5 1.5 2.0 1.5 7.0
11.0 14.0 8.0 -- -- --
2.0 1.5 1.5 2.0 1.5 5.0
6.5 6.5 5.5 -- -- --
2.0 1.5 1.5 2.0 1.5 6.0
7.2 7.5 6.5 -- -- --
2.0 1.5 1.5 2.0 1.5 5.0
5.2 5.5 5.0 -- -- --
2.0 1.5 1.5 2.0 1.5 6.0
6.2 6.2 5.7 -- -- --
ns ns ns ns ns ns
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. ON for FCT374 and FCT574, ON for FCT534.
2603 tbl 07
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IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
VCC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 V OUT 7.0V
SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Switch Closed Open
DEFINITIONS: 2603 tbl 08 CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
SET-UP, HOLD AND RELEASE TIMES
DATA INPUT t SU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. t REM 3V 1.5V 0V 3V 1.5V 0V tH 3V 1.5V 0V 3V 1.5V 0V
PULSE WIDTH
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
1.5V
t SU
tH
PROPAGATION DELAY
3V 1.5V tPLH OUTPUT t PLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V t PHL 0V VOH 1.5V VOL
ENABLE AND DISABLE TIMES
ENABLE CONTROL INPUT t PZL OUTPUT NORMALLY SWITCH LOW CLOSED t PZH OUTPUT SWITCH NORMALLY OPEN HIGH 3.5V 1.5V 0.3V t PHZ 0.3V 1.5V 0V V OH 0V t PLZ DISABLE 3V 1.5V 0V 3.5V V OL
SAME PHASE INPUT TRANSITION
NOTES 2603 drw 15 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0 MHz; ZO 50; tF 2.5ns; tR 2.5ns.
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IDT54/74FCT374/534/574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT FCT XX XXXX Temp. Range Device Type X Package X Process Blank B P D SO L E 374 574 534 374A 574A 534A 374C 574C 534C 54 74 Commercial MIL-STD-883, Class B Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK Non-Inverting Octal D Register Non-Inverting Octal D Register Inverting Octal D Register Fast Non-Inverting Octal D Register Fast Non-Inverting Octal D Register Fast Inverting Octal D Register Super Fast Non-Inverting Octal D Register Super Fast Non-Inverting Octal D Register Super Fast Inverting Octal D Register -55C to +125C 0C to +70C
2603 cnv* 14
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